From 112f478b2fc9f5365a5e2111cde1decfb0ceff0d Mon Sep 17 00:00:00 2001 From: Marc Lasch Date: Mon, 1 May 2017 21:24:54 +0200 Subject: Major library update --- test/test_usv.py | 65 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 test/test_usv.py (limited to 'test/test_usv.py') diff --git a/test/test_usv.py b/test/test_usv.py new file mode 100644 index 0000000..5a013ae --- /dev/null +++ b/test/test_usv.py @@ -0,0 +1,65 @@ +import pytest + +from usv import Usv + +class MockUsvSerial(object): + def __init__(self, *args, **kwargs): + self.buf = [] + + def open(self): + pass + + def write(self, buf): + self.buf.insert(1, buf) + + def read(self, size): + cmd = self.buf.pop() + + if cmd == '\r': + return '\r=>' + elif cmd == 'd 1\r': + return '01 V In 219\r=>' + elif cmd == 'd 2\r': + return '02 V Out 215\r=>' + elif cmd == 'd 5\r': + return '05 VA Out 108\r=>' + elif cmd == 'd 7\r': + return '07 V Batt 52.7\r=>' + elif cmd == 'd 8\r': + return '08 Freq 50.01 Hz\r=>' + elif cmd == 'd 16\r': + return '16 FullLoad% 007\r=>' + elif cmd == 'd 17\r': + return '17 Watts 83\r=>' + elif cmd == 'd 18\r': + return '18 PF 1.00 ----\r=>' + elif cmd == 'd 19\r': + return '19 CrestF 1.44\r=>' + elif cmd == 'd 20\r': + return '20 #PwrOut 157\r=>' + elif cmd == 'd 23\r': + return '23 InvMin 0231.2\r=>' + + +class TestUsv(object): + def test_usv(self, monkeypatch): + monkeypatch.setattr('usv.usv.Serial', MockUsvSerial) + + usv_handle = Usv('/dev/usv') + + fields = usv_handle.read() + + assert len(fields) == 11 + + assert fields['acvoltsin'] == 219.0 + assert fields['acvoltsout'] == 215.0 + assert fields['vaout'] == 108.0 + assert fields['vbattery'] == 52.7 + assert fields['frequency'] == 50.01 + assert fields['fullload'] == 7.0 + assert fields['watts'] == 83.0 + assert fields['powerfactor'] == 1.0 + assert fields['crestfactor'] == 1.44 + assert fields['powerout'] == 157.0 + assert fields['inverterminutes'] == 231.2 + -- cgit v1.2.1